LFSR (Random Number Generator)

Inputs

PinTypeDescription
ClockbitShift register on rising edge (0→1)
DevAddrbus8Device address — 0x1A for port 0xFA
IO_SELbitI/O select — must be 1 to read the LFSR

Outputs

PinTypeDescription
Databus8Current 8-bit pseudorandom value (0–255)

How It Works

The LFSR (Linear Feedback Shift Register) generates an 8-bit pseudorandom sequence using the polynomial:

x⁸ ⊕ x⁶ ⊕ x⁵ ⊕ x⁴ ⊕ 1

On each clock rising edge, the register shifts left by one bit and the new least-significant bit is computed as:

new_bit = state[7] ⊕ state[5] ⊕ state[4] ⊕ state[3]

The seed value is 0x9C (156 decimal). The sequence is deterministic — given the same seed, the same sequence is always produced — but it passes statistical tests for randomness and cycles through all 255 non-zero states before repeating.

To read the current value via the I/O subsystem, set IO_SEL = 1 and DevAddr = 0x1A (port 0xFA, decimal 250). In assembly: LDA 250 reads the LFSR into the accumulator.

Usage

The LFSR is used in the following levels:

To generate a new random number, pulse the Clock input. To read the value, enable IO_SEL and set DevAddr = 0x1A. Typical usage in assembly:

; Read random number for food X coordinate
LDA 250    ; Read LFSR (port 0xFA)
AND 15     ; Mask to 0–15 range
STA 0      ; Store as X coordinate
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