Level 10: Loopback

Task

Build an SR latch from NOR gates. State is held when S=0, R=0.

An SR latch is the simplest 1-bit memory cell. Inputs: S (Set — make output 1) and R (Reset — make output 0). Outputs: Q and NQ (inverted).

Solution

Built from two NOR gates. The simulator has no standalone NOR — use OR + NOT: feed OR output into NOT = that gives NOR.

Build two such NORs. Now the key — CROSS-CONNECTION:

1. Connect first NOR output (Q) to the SECOND input of the SECOND NOR. 2. Connect second NOR output (NQ) to the SECOND input of the FIRST NOR. 3. Feed the remaining first inputs: first NOR gets R, second NOR gets S.

How it works: - S=1,R=0 → Q=1 (set). - S=0,R=1 → Q=0 (reset). - S=0,R=0 → PREVIOUS state is preserved. This is memory!